A low-power low-noise amplifier in 0.35µm SOI CMOS technology
نویسندگان
چکیده
A low-power 435-MHz single-ended low-noise amplifier was implemented in a 0.35-μm silicon on insulator (SOI) CMOS technology. The SOI CMOS LNA has a simulated noise figure of 0.6 dB, input 1-dB compression point of –12.5 dBm, input thirdorder intercept point of –5 dBm, and small-signal gain of 22 dB. Total power dissipation is 10 mW from a 2.5-V supply. LNA chip area is 1.4 mm x 0.58 mm. Due to high-resistivity silicon substrate and buried oxide isolation, SOI CMOS technology offers significant performance improvements for mixed-signal VLSI and RF/Microwave integrated circuits.
منابع مشابه
A High Gain and Forward Body Biastwo-stage Ultra-wideband Low Noise Amplifier with Inductive Feedback in 180 nm CMOS Process
This paper presents a two-stage low-noise ultra-wideband amplifier to obtain high and smooth gain in 180nm CMOS Technology. The proposed structure has two common source stages with inductive feedback. First stage is designed about 3GHz frequency and second stage is designed about 8GHz. In simulation, symmetric inductors of TSMC 0.18um CMOS technology in ADS software is used.Simulations results ...
متن کاملA W-band Simultaneously Matched Power and Noise Low Noise Amplifier Using CMOS 0.13µm
A complete procedure for the design of W-band low noise amplifier in MMIC technology is presented. The design is based on a simultaneously power and noise matched technique. For implementing the method, scalable bilateral transistor model parameters should be first extracted. The model is also used for transmission line utilized in the amplifier circuit. In the presented method, input/output ma...
متن کاملAnalytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier
We propose a design methodology of a low-voltage CMOS low-noise amplifier (LNA) consisting of a common-source and a common-gate stages. We first derive equations of power gain, noise figure (NF) and input third-order intercept point (IIP3) of the two-stage LNA. A design methodology of the LNA is presented by using graphs based on analytical equations. A 1-V 5.4-GHz LNA was implemented in 0.15-μ...
متن کاملAnalysis and design of a CMOS current reused cascaded distributed amplifier with optimum noise performance
In this paper, analysis, simulation and design of a distributed amplifier (DA) with 0.13µm CMOS technology in the frequency range of 3-40 GHz is presented. Gain cell is a current reused circuit which is optimum in gain, noise figure, bandwidth and also power dissipation. To improve the noise performance in the frequency range of interest, a T-matching low pass filter LC network which is utilize...
متن کاملA New Ultra-Wideband Low Noise Amplifier With Continuous Gain Control
This paper presents a new variable gain low noise amplifier (VG-LNA) for ultra-wideband (UWB) applications. The proposed VG-LNA uses a common-source (CS) with a shunt-shunt active feedback as an input stage to realize input matching and partial noise cancelling. An output stage consists of a gain-boosted CS cascode and a gain control circuit that moves the high resonant frequency to higher freq...
متن کامل